This book discusses Moore finite state machines (FSMs) implemented with field programmable gate arrays (FPGAs) including look-up table (LUT) elements and embedded memory blocks (EMBs). To minimize the number of LUTs in FSM logic circuits, the authors propose replacing a state register with a state counter. They also put forward an approach allowing linear chains of states to be created, which simplifies the system of input memory functions and, therefore, decreases the number of LUTs in the resulting FSM circuit. The authors combine this approach with using EMBs to implement the system of output functions (microoperations). This allows a significant decrease in the number of LUTs, as well as eliminating a lot of interconnections in the FSM logic circuit. As a rule, it also reduces the area occupied by the circuit and diminishes the resulting power dissipation.

This book is an interesting and valuable resource for students and postgraduates in the area of computer science, as well as for designers of digital systems that included complex control units

This book discusses Moore finite state machines (FSMs) implemented with field programmable gate arrays (FPGAs) including look-up table (LUT) elements and embedded memory blocks (EMBs). To minimize the number of LUTs in FSM logic circuits, the authors propose replacing a state register with a state counter. They also put forward an approach allowing linear chains of states to be created, which simplifies the system of input memory functions and, therefore, decreases the number of LUTs in the resulting FSM circuit. The authors combine this approach with using EMBs to implement the system of output functions (microoperations). This allows a significant decrease in the number of LUTs, as well as eliminating a lot of interconnections in the FSM logic circuit. As a rule, it also reduces the area occupied by the circuit and diminishes the resulting power dissipation.

This book is an interesting and valuable resource for students and postgraduates in the area of computer science, as well as for designers of digital systems that included complex control units

This book is devoted to embedded systems (ESs), which can now be found in practically all fields of human activity. Embedded systems are essentially a special class of computing systems designed for monitoring and controlling objects of the physical world. The book begins by discussing the distinctive features of ESs, above all their cybernetic-physical character, and how they can be designed to deliver the required performance with a minimum amount of hardware. In turn, it presents a range of design methodologies. Considerable attention is paid to the hardware implementation of computational algorithms. It is shown that different parts of complex ESs could be implemented using models of finite state machines (FSMs). Also, field-programmable gate arrays (FPGAs) are very often used to implement different hardware accelerators in ESs. The book pays considerable attention to design methods for FPGA-based FSMs, before the closing section turns to programmable logic controllers widely used in industry. This book will be interesting and useful for students and postgraduates in the area of Computer Science, as well as for designers of embedded systems. In addition, it offers a good point of departure for creating embedded systems for various spheres of human activity.

Background of Finite State Machines and Programmable Logic.- Field Programmable Gate Arrays in FSM design.-Object Codes Transformation for Mealy FSMs.- Object Codes Transformation for Moore FSMs.- Distribution of class codes in Moore FSMs.- Hardware Reduction in Multidirectional Moore FSMs.- Design of EMB-Based Mealy FSMs.- Design of EMB-Based Moore FSMs.

This book is devoted to embedded systems (ESs), which can now be found in practically all fields of human activity. Embedded systems are essentially a special class of computing systems designed for monitoring and controlling objects of the physical world. The book begins by discussing the distinctive features of ESs, above all their cybernetic-physical character, and how they can be designed to deliver the required performance with a minimum amount of hardware. In turn, it presents a range of design methodologies. Considerable attention is paid to the hardware implementation of computational algorithms. It is shown that different parts of complex ESs could be implemented using models of finite state machines (FSMs). Also, field-programmable gate arrays (FPGAs) are very often used to implement different hardware accelerators in ESs. The book pays considerable attention to design methods for FPGA-based FSMs, before the closing section turns to programmable logic controllers widely used in industry. This book will be interesting and useful for students and postgraduates in the area of Computer Science, as well as for designers of embedded systems. In addition, it offers a good point of departure for creating embedded systems for various spheres of human activity.

This book focuses on control units, which are a vital part of modern digital systems, and responsible for the efficiency of controlled systems. The model of a finite state machine (FSM) is often used to represent the behavior of a control unit. As a rule, control units have irregular structures that make it impossible to design their logic circuits using the standard library cells. Design methods depend strongly on such factors as the FSM used, specific features of the logic elements implemented in the FSM logic circuit, and the characteristics of the control algorithm to be interpreted.

This book discusses Moore and Mealy FSMs implemented with FPGA chips, including look-up table elements (LUT) and embedded memory blocks (EMB). It is crucial to minimize the number of LUTs and EMBs in an FSM logic circuit, as well as to make the interconnections between the logic elements more regular, and various methods of structural decompositions can be used to solve this problem. These methods are reduced to the presentation of an FSM circuit as a composition of different logic blocks, the majority of which implement systems of intermediate logic functions different (and much simpler) than input memory functions and FSM output functions. The structural decomposition results in multilevel FSM circuits having fewer logic elements than equivalent single-level circuits. The book describes well-known methods of structural decomposition and proposes new ones, examining their impact on the final amount of hardware in an FSM circuit. It is of interest to students and postgraduates in the area of Computer Science, as well as experts involved in designing digital systems with complex control units. The proposed models and design methods open new possibilities for creating logic circuits of control units with an optimal amount of hardware and regular interconnections.

The book is devoted to design and optimization of control units represented by combined finite state machines (CFSMs). The CFSMs combine features of both Mealy and Moore FSMs. Having states of Moore FSM, they produce output signals of both Mealy and Moore types. To optimize the circuits of CFSMs, we propose to use optimization methods targeting both Mealy and Moore FSMs. The book contains some original synthesis and optimization methods targeting hardware reduction in VLSI-based CFSM circuits. These methods take into account the peculiarities of both a CFSM model and a VLSI chip in use. The optimization is achieved due to combining classical optimization methods with new methods proposed in this book. These new methods are a mixed encoding of collections of microoperations and a twofold state assignment in CFSMs. All proposed methods target reducing the numbers of arguments in systems of Boolean functions representing CFSM circuits. Also, we propose to use classes of pseudoequivalent states of Moore FSMs to reduce the number of product terms in these systems.The book includes a lot of examples which contributes to a better understanding of the features of the synthesis methods under consideration.
This is the first book entirely devoted to the problems associated with synthesis and optimization of VLSI-based CFSMs. We hope that the book will be interesting and useful for students and PhD students in the area of Computer Science, as well as for designers of various digital systems. We think that proposed CFSM models enlarge the class of models applied for implementation of control units with modern VLSI chips.

The book is devoted to design and optimization of control units represented by combined finite state machines (CFSMs). The CFSMs combine features of both Mealy and Moore FSMs. Having states of Moore FSM, they produce output signals of both Mealy and Moore types. To optimize the circuits of CFSMs, we propose to use optimization methods targeting both Mealy and Moore FSMs. The book contains some original synthesis and optimization methods targeting hardware reduction in VLSI-based CFSM circuits. These methods take into account the peculiarities of both a CFSM model and a VLSI chip in use. The optimization is achieved due to combining classical optimization methods with new methods proposed in this book. These new methods are a mixed encoding of collections of microoperations and a twofold state assignment in CFSMs. All proposed methods target reducing the numbers of arguments in systems of Boolean functions representing CFSM circuits. Also, we propose to use classes of pseudoequivalent states of Moore FSMs to reduce the number of product terms in these systems.The book includes a lot of examples which contributes to a better understanding of the features of the synthesis methods under consideration.
This is the first book entirely devoted to the problems associated with synthesis and optimization of VLSI-based CFSMs. We hope that the book will be interesting and useful for students and PhD students in the area of Computer Science, as well as for designers of various digital systems. We think that proposed CFSM models enlarge the class of models applied for implementation of control units with modern VLSI chips.

This book is devoted to the logic synthesis of field programmable gate array (FPGA)-based circuits of Mealy finite state machines (FSM). Three new methods of state assignment are proposed, which allows obtaining FSM circuits required minimum amount of internal chip resources.

Logic Synthesis for FPGA-Based Mealy Finite State Machines: Structural Decomposition in Logic Design contains several original synthesis and optimization methods based on the structural decomposition of FPGA-based FSM circuits developed by the authors. To optimize FSM circuits, the authors introduce the use of three methods of state assignment: twofold, extended, and composite. These methods allow for the creation of two- or three-level architectures of FSM circuits. The authors also demonstrate how the proposed methods, FSM architectures and synthesis methods can replace known solutions based on either functional decomposition or classical methods of structural decomposition. The authors also show how these architectures have regular systems of interconnections and demonstrate positive features compared to methods based on functional decomposition, including producing circuits with fewer elements that are faster and consume less power than their counterparts. The book includes experimental results proving the efficiency of the proposed solutions and compares the numbers in Look-up Tables (LUTs), showing the performance (maximum operating frequency) and power consumption for various methods of state assignment.

The audience for this book is students, researchers, and engineers specializing in computer science/ engineering, electronics, and telecommunications. It will be especially useful for engineers working within the scope of algorithms, hardware-based software accelerators and control units, and systems based on the use of FPGAs.

This book focuses on control units, which are a vital part of modern digital systems, and responsible for the efficiency of controlled systems. The model of a finite state machine (FSM) is often used to represent the behavior of a control unit. As a rule, control units have irregular structures that make it impossible to design their logic circuits using the standard library cells. Design methods depend strongly on such factors as the FSM used, specific features of the logic elements implemented in the FSM logic circuit, and the characteristics of the control algorithm to be interpreted.

This book discusses Moore and Mealy FSMs implemented with FPGA chips, including look-up table elements (LUT) and embedded memory blocks (EMB). It is crucial to minimize the number of LUTs and EMBs in an FSM logic circuit, as well as to make the interconnections between the logic elements more regular, and various methods of structural decompositions can be used to solve this problem. These methods are reduced to the presentation of an FSM circuit as a composition of different logic blocks, the majority of which implement systems of intermediate logic functions different (and much simpler) than input memory functions and FSM output functions. The structural decomposition results in multilevel FSM circuits having fewer logic elements than equivalent single-level circuits. The book describes well-known methods of structural decomposition and proposes new ones, examining their impact on the final amount of hardware in an FSM circuit. It is of interest to students and postgraduates in the area of Computer Science, as well as experts involved in designing digital systems with complex control units. The proposed models and design methods open new possibilities for creating logic circuits of control units with an optimal amount of hardware and regular interconnections.

One of the very important parts of any digital system is the control unit, coordin- ing interplay of other system blocks. As a rule, control units have irregular str- ture, which makes process of their logic circuits design very sophisticated. In case of complex logic controllers, the problem of system design is reduced practically to the design of control units. Actually, we observe a real technical boom connected with achievements in semiconductor technology. One of these is the development of integrated circuit known as the systems-on-a-programmable- chip (SoPC), where the number of elements approaches one billion. Because of the extreme complexity of microchips, it is very important to develop effective design methods oriented on particular properties of logical elements. Solution of this problem permits impr- ing functional capabilities of the target digital system inside single SoPC chip. As majority of researches point out, design methods used in case of industrial packages are, in case of complex digital system design, far from optimal. Similar problems concern the design of control units with standard ?eld-programmable logic devices (FPLD), such as PLA, PAL, GAL, CPLD, and FPGA. Let us point out that modern SoPC are based on CPLD or FPGA technology. Thus, the development of eff- tive design methods oriented on FPLD implementation of logic circuits used in the control units still remains the problem of great importance.

One of the very important parts of any digital system is the control unit, coordin- ing interplay of other system blocks. As a rule, control units have irregular str- ture, which makes process of their logic circuits design very sophisticated. In case of complex logic controllers, the problem of system design is reduced practically to the design of control units. Actually, we observe a real technical boom connected with achievements in semiconductor technology. One of these is the development of integrated circuit known as the systems-on-a-programmable- chip (SoPC), where the number of elements approaches one billion. Because of the extreme complexity of microchips, it is very important to develop effective design methods oriented on particular properties of logical elements. Solution of this problem permits impr- ing functional capabilities of the target digital system inside single SoPC chip. As majority of researches point out, design methods used in case of industrial packages are, in case of complex digital system design, far from optimal. Similar problems concern the design of control units with standard ?eld-programmable logic devices (FPLD), such as PLA, PAL, GAL, CPLD, and FPGA. Let us point out that modern SoPC are based on CPLD or FPGA technology. Thus, the development of eff- tive design methods oriented on FPLD implementation of logic circuits used in the control units still remains the problem of great importance.

Hardwired Interpretation of Control Algorithms.- Matrix Realization of Control Units.- Evolution of Programmable Logic.- Optimization for Logic Circuit of Mealy FSM.- Optimization for Logic Circuit of Moore FSM.- FSM Synthesis with Transformation of GSA.- FSM Synthesis with Object Code Transformation.- FSM Synthesis with Elementary Chains.- Conclusion.

Hardwired Interpretation of Control Algorithms.- Matrix Realization of Control Units.- Evolution of Programmable Logic.- Optimization for Logic Circuit of Mealy FSM.- Optimization for Logic Circuit of Moore FSM.- FSM Synthesis with Transformation of GSA.- FSM Synthesis with Object Code Transformation.- FSM Synthesis with Elementary Chains.- Conclusion.

Background of Finite State Machines and Programmable Logic.- Field Programmable Gate Arrays in FSM design.-Object Codes Transformation for Mealy FSMs.- Object Codes Transformation for Moore FSMs.- Distribution of class codes in Moore FSMs.- Hardware Reduction in Multidirectional Moore FSMs.- Design of EMB-Based Mealy FSMs.- Design of EMB-Based Moore FSMs.